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Exhibit
10.31
This Technology Licence
Agreement (the “Agreement”) is made the 16th day of
December 1996
BETWEEN
ADVANCED RISC MACHINES
LIMITED whose registered office is situated at 90, Fulbourn
Road, Cherry Hinton, Cambridge CBI 4JN, England
(“ARM”)
and
LG SEMICON COMPANY
LIMITED whose principal place of business is situated at 16
Woomyeon-dong. Seocho-gu. Seoul 137-140, Korea
(“LGS”).
WHEREAS
LGS has requested ARM and ARM
has agreed, to license LGS to manufacture and distribute certain
ARM products and thereby to make use of certain portions of the
Intellectual Property (as defined below) upon the terms set out in
this Agreement.
In consideration of the
mutual representations, warranties, covenants, and other terms and
conditions contained herein, the parties agree as
follows:
| 1.1 |
“ ARM Compliant Product ” shall mean any
single silicon chip developed by LGS which contains, at a minimum:
(i) an ARM7TDMI Core; or (ii) a Modified ARM7TDMI Core, which has
been verified in accordance with the provisions of Clause
3. |
| 1.2 |
“ ARM7TDMI Core ” shall mean the device as
described and identified in the ARM7TDMI datasheet identified in
Schedule 2 Part A Item A1. |
| 1.3 |
“ ARM Instruction Set ” shall mean both the
ARM Instruction Set and THUMB Instruction Set as each are defined
in the ARM Architecture and Reference Manual identified in Schedule
2 Part A Item A2. |
| 1.4 |
“ Authorised Distributor ” shall mean those
distributors appointed, in writing, by LGS. |
| 1.5 |
“ AVS ” shall mean the ARM Architectural
Validation Suite in binary code format Schedule 2 Part B Section 2
Item T3. |
| 1.6 |
“ Confidential Information ” shall mean: (i)
any trade secrets relating to the ARM7TDMI Core and Transfer
Materials and the source code for any Software; (ii) any
information designated in writing by either party as confidential
which if disclosed verbally is reduced to writing within thirty
(30) days after its oral disclosure; and (iii) the terms and
conditions of this Agreement. |
| 1.7 |
“ Core Functional Test Vectors ” shall mean
the test vectors identified in Schedule 2 Part A Items B10, B11,
B12 and B13. |
| 1.8 |
“ Design Win Event ” shall mean for each
different Design Win Product, the point in time of the sale, supply
or other distribution of five hundred (500) units of such
product. |
| 1.9 |
“ Design Win Product ” shall mean an
application specific product made by LGS, an LG Affiliate or LG
Group Company, which incorporates an ARM Compliant
Product. |
| 1.10 |
“ Effective Date ” shall mean the date of
this Agreement or the date upon which the Korean Government gives
approval to this Agreement, whichever is the later, subject always
to the provisions of Clause 18.4. |
| 1.11 |
“ Embedded ICE ” shall mean the Embedded ICE
Protocol Converter identified in Schedule 14. |
| 1.12 |
“ End User Licence ” shall mean a licence
agreement substantially conforming to that agreement set forth in
Schedule 7. |
| 1.13 |
“ Half Year ” shall mean each calendar half
year ending the 30th June and 31st December of any
year. |
| 1.14 |
“ HP ” shall mean any Hewlett Packard
compatible computer running HP-UX v9.0.5 (and later versions as may
be mutually agreed). |
| 1.15 |
“ IBM PC ” shall mean any computer. 486 (or
above) processor based IBM AT architecture, having, at a minimum.
16Mb RAM. 50Mb hard disc space and running Microsoft DOS v6.2 (and
later versions as may be mutually agreed) and, where appropriate,
Microsoft Windows 95 or Windows NT. ARM will use reasonable
endeavours, in collaboration with LGS, to ensure the Software
operates on reputable IBM PC compatible computers provided that
such operation is not constrained by significant hardware or
software deficiencies. |
| 1.16 |
“ Intellectual Property ” shall mean any
patents, patent rights, trade marks, service marks, registered
designs, topography or semiconductor maskwork rights, applications
for any of the foregoing, copyright, know-how, unregistered design
right, confidential information, any Intellectual Property
Derivatives, and any other similar protected rights in any country,
which are taken into use in the design, use or production of the
ARM7TDMI Core. Software or Transfer Materials. |
| 1.17 |
“ Intellectual Property Derivatives ” shall
include: (i) for copyrightable or copyrighted material, any
translation, abridgement, revision or other form in which an
existing work may be recast, transformed or adapted; (ii) for work
protected by topography or mask right, any translation,
abridgement, revision or other form in which an existing work may
be recast, transformed or adapted; (iii) for patentable or patented
material, any improvement created by ARM; and (iv) for material
protected by trade secret any new material derived from or
employing such existing trade secret. |
| 1.18 |
“ LG Affiliate ” shall mean each of the
companies set forth in Schedule 10. An LG Affiliate shall cease to
be an LG Affiliate when; (i) it is merged into a corporation other
than an LG Group Company; or (ii) the majority of its voting shares
becomes owned or controlled by a person, company or other legal
entity other than an LG Group Company; or (iii) the Chief Executive
Officer (referred to in Korean as “Hoejang”) ceases to
control directly or indirectly such LG Affiliate. |
| 1.19 |
“ LG Group Company ” shall mean each of the
companies identified in Schedule 8. |
| 1.20 |
“ LGS Users ” shall mean LGS (or any LG
Group Company) when incorporating an ARM Compliant Product,
distributed pursuant to this Agreement, for use in LGS’s (or
such LG Group Company’s) end user products. |
| 1.21 |
“ LGS Materials ” shall mean such of the
Transfer Materials (or any additional materials) as are necessary
to enable ARM, in respect of any Modified ARM7TDMI Core, to
exercise the rights set out in Clause 2.3. |
| 1.22 |
“
Models ” shall mean: (i) the object code and source
code of the programs identified in Schedule 3 Part A; (ii) the
object code and such source code of the programs identified in
Schedule 3 Part B as may be necessary (at ARM’s absolute
discretion) to allow the support of
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subsequent releases of the
specified simulator: and (iii) subject to the payment by LGS of the
fee(s) set out in Clause 9.2, the object code and such source code
of the programs identified in Schedule 3 Part C as may be necessary
(at ARM’s absolute discretion) to allow the support of
subsequent releases of the specified simulator; together with such
Updates thereof, if any, as are developed by or for ARM.
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| 1.23 |
“ Modified ARM7TDMI Core ” shall mean any
ARM7TDMI Core modified in accordance with the provisions of Clause
2.2. |
| 1.24 |
“ NSP ” shall mean the net sales price of
any ARM Compliant Product calculated by taking the aggregate
invoice price charged on arm’s length terms by LGS and its
Subsidiaries in the sale or distribution of any ARM Compliant
Product, less any (i) value added, turnover, import, or other tax,
duty or tariff payable thereon (ii) freight and insurance costs
incurred and (iii) amounts actually repaid or credited with respect
to any ARM Compliant Products returned. |
In the event that ARM, in its
discretion, considers that the NSP for any ARM Compliant Product
charged to LGS Users is materially below the open market value for
such ARM Compliant Product, the NSP shall be deemed to be: in the
case of the sale or distribution of any ARM Compliant Product to
LGS Users, the net sales price for such ARM Compliant Product sold
by LGS to third parties; and in the case of the sale or
distribution of ARM Compliant Products manufactured for, and
supplied solely to, LGS Users, at a minimum, the sum of:
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(i) |
the cost of materials and the cost of fabrication or such other
processing of such ARM Compliant Product; and |
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(ii) |
an amount for general expenses and profit equal to that usually
reflected in the sales to third parties of products of the same
general class or kind as the ARM Compliant Product; and |
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(iii) |
the cost of all packaging. |
| 1.25 |
“ PIV Card ” shall mean the hardware
identified in Schedule 2 Section 1 Part A as Item E1. |
| 1.26 |
“ Software ” shall mean together the Models,
Tools, Test Programs, Embedded ICE and Vectors. |
| 1.27 |
“ Subsidiary ” shall mean any company the
majority of whose voting shares is now or hereafter owned or
controlled, directly or indirectly, by a party hereto or any
company a majority of whose voting shares is now or hereafter owned
or controlled, directly or indirectly, by any of the aforementioned
entities. A company shall be considered a Subsidiary only so long
as such control exists. |
| 1.28 |
“ Sun/SunOS ” shall mean any Sun/SPARC
compatible computer running SunOS v4.1.3_u1 (and later versions as
may be mutually agreed). |
| 1.29 |
“ Test Programs ” shall mean the source code
and object code of the programs identified in Schedule 2 Part B
Section 1 Items T1 and T2 together with such Updates, if any, as
are developed by or for ARM. |
| 1.30 |
“ Test Chip ” shall mean a device which
complies with the test chip specification set forth in Schedule 2
Part A Item D1. |
| 1.31 |
“ Test Chip Characterisation Vectors
” shall mean those test vectors identified in Schedule 2 Part
A Items D6, D7, D8 and D9. |
| 1.32 |
“ Test Chip Functional Vectors ” shall mean
those test vectors identified in Schedule 2 Part A Items D4 and
D5. |
| 1.33 |
“ Tools ” shall mean the source and object
code of the programs identified in Schedule 4 Parts A and B; and
(ii) the documentation identified in Schedule 4 Part C, together
with such Updates, if any, as are developed by or for
ARM. |
| 1.34 |
“ Trademarks ” shall mean the trademarks,
service marks and logos set forth in Schedule 5. |
| 1.35 |
“ Transfer Materials ” shall mean that
technical information with respect to the ARM7TDMI Core identified
in Schedule 2 Part A. |
| 1.36 |
“ Updates ” shall mean; (i) for the
Software, any bug fixes or enhancements to the Software the
incorporation of which ARM, in its absolute discretion, decides
does not cause to be created a new product; and (ii) for the
Transfer Materials, all modifications, enhancements and updates to
the Transfer Materials, created by ARM, including such
modifications to the Transfer Materials as are made by ARM’s
other licencees and adopted by ARM for general release as an update
provided that ARM may exclude any modification, enhancement or
update which ARM, in its absolute discretion decides, results in
the creation of a new product; |
| 1.37 |
“ Use ” shall mean copying the programs
identified in Schedule 3 Parts B and C and Schedule 4 Parts A and C
onto a computer for the purposes of processing the instructions or
statements contained therein, but excluding disassembly, reverse
assembly, or reverse compiling except as permitted by local
legislation implementing Article 6 of the EC Software Directive and
only to the extent necessary to achieve interoperability of an
independently created program with other programs. Disassembly,
reverse assembly, or reverse compiling for die purpose of error
correction is specifically prohibited. |
| 1.38 |
“ Vectors ” shall mean together the Test
Chip Functional Vectors and Test Chip Characterisation
Vectors. |
| 1.39 |
“ 1995 Agreement ” shall mean the Technology
Licence Agreement between ARM and LGS dated the 5th October
1995. |
| 2.1 |
In consideration of the fee (“Core Fee”) set out in
Schedule 12 Part A, ARM hereby grants to LGS, under the
Intellectual Property, a perpetual (subject to Clause 18),
non-transferable (subject to Clause 20.3), non-exclusive,
world-wide right and licence to: |
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(i) |
use, modify (subject to the provisions of Clauses 2.2 and 2.3)
and copy the Transfer Materials solely for the purposes of
creating, developing, manufacturing, having manufactured (subject
to the provisions of Clauses 2.4 and 2.5), and selling, supplying
and distributing to any third party, ARM Compliant
Products; |
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(ii) |
modify, translate, reproduce and distribute, subject to the
confidentiality obligations set forth in Clause 14, the
documentation identified in Schedule 2 (except Item
A2). |
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(i) |
the internal logic of any ARM7TDMI Core: |
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(ii) |
the layout of any ARM7TDMI Core where necessary for the
purposes of manufacturing such ARM7TDMI Core on another CMOS
process, |
PROVIDED ALWAYS THAT the
Modified ARM7TDMI Core retains compatibility with the ARM
Instruction Set. A Modified ARM7TDMI Core will be deemed compatible
if the Test Chip for the Modified ARM7TDMI Core: (i) executes each
and every instruction contained in the ARM Instruction Set; (ii)
executes the instructions at an identical rate of clocks per
instruction as the ARM7TDMI Core from which it was derived; and
(iii) runs the Vectors and the AVS.
| 2.3 |
LGS hereby grants to ARM, in respect of all modifications made
to the ARM7TDMI Core (“Modifications”), a perpetual and
irrevocable, royalty-free, non-transferable, non-exclusive,
world-wide right and licence to manufacture, have manufactured,
modify, create derivative works of, use, sell, supply and
distribute all Modifications and sub-license others to exercise
similar rights with respect to such Modifications. In pursuance of
the licence to all Modifications hereby granted, LGS
shall; |
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2.3.1 |
prior to any prototype production of the first ARM Compliant
Product including any Modification, deliver to ARM, in writing, a
full technical description of such proposed Modification;
and |
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2.3.2 |
within thirty (30) days of the first shipment of the first ARM
Compliant Product including any Modification, deliver to ARM the
LGS Materials for such ARM Compliant Product including the
Modification. |
For the avoidance of doubt,
nothing in this Clause 2.3 shall be construed as granting to ARM
any right or licence to any peripheral devices owned by LGS which
are integrated around the ARM7TDMI Core.
ARM shall notify LGS in the
event that ARM incorporates any Modification in any general update
to or general release of the ARM7TDMI Core.
| 2.4 |
LGS may exercise its right to have manufactured ARM Compliant
Products provided that: |
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(i) |
LGS notifies ARM of the identity of LGS’s subcontracted
manufacturer (“Manufacturer”) not less than thirty (30)
days prior to first prototype production by the Manufacturer;
and |
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(ii) |
LGS ensures that any Manufacturer agrees (i) to be bound by the
same obligations of confidentiality as are contained in this
Agreement and (ii) to supply The ARM Compliant Products solely to
LGS. |
In the event that any
Manufacturer breaches the provisions referred to in this Clause
2.4, LGS agrees that such breach shall be treated as a material
breach of this Agreement by LGS which is incapable of remedy.
Further LGS hereby undertakes to keep ARM indemnified against all
and any loss, liability, costs, damages, expenses (including the
fees of lawyers and other professionals), suffered, incurred or
sustained as a result of or in relation to such breach.
For the avoidance of doubt,
in the event that LGS subcontracts only the packaging of ARM
Compliant Products to a third party, LGS shall be released from the
obligations of this Clause 2.4.
| 2.5 |
In the event that LGS subcontracts the packaging of ARM
Compliant Products, LGS shall |
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(i) |
ensure that the packaging company agrees to supply the ARM
Compliant Products solely to LGS; and |
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(ii) |
undertake to keep ARM indemnified against all and any loss,
liability, costs, damages, expenses (including the fees of lawyers
and other professionals), suffered, incurred or sustained as a
result of or in relation to the breach of the provisions of Clause
2.5(i). |
| 2.6 |
For the avoidance of doubt, no right is granted to LGS
to: |
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(i) |
sublicense the rights licensed to LGS pursuant to Clause
2.1; |
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(ii) |
distribute any ARM Compliant Product prior to verification in
accordance with Clause 3 except that in the event that it is the
intention of LGS, and LGS do proceed, to verify a device in
accordance with Clause 3, LGS may distribute a maximum of one
hundred (100) prototype units of such device without having
verified such device. |
| 2.7 |
Save as licensed in Clause 2.1, LGS acquires no right, title or
interest in the ARM7TDMI Core or Transfer Materials and
Intellectual Property. In no event shall the licence grant set
forth in Clause 2.1 be construed as granting LGS, expressly or by
implication, estoppel or otherwise, a licence to use any ARM
technology or intellectual property other than that pertaining to
the ARM7TDMI Core. |
| 2.8 |
During the term of this Agreement, LGS may exercise the right
to include any Subsidiary as a licence of ARM provided
that: |
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(i) |
such Subsidiary agrees in writing, as set forth in Schedule 1,
to be bound by the obligations of LGS and to comply with all the
terms and conditions of this Agreement LGS shall deliver to ARM a
copy of the Subsidiary’s undertaking within thirty (30) days
of the execution of such undertaking: |
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(ii) |
any breach of the terms and conditions of this Agreement by a
Subsidiary shall constitute a breach of this Agreement by
LGS; |
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(iii) |
any termination of this Agreement as provided by Clause 18
shall be effective in respect of all Subsidiaries; |
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(iv) |
any licence, granted in accordance with the provisions of this
Clause 2.8, shall automatically terminate upon any Subsidiary
ceasing to be a Subsidiary. |
| 2.9 |
During the term of this Agreement LGS may exercise the right to
include any LG Affiliate as a Licence of ARM provided
that: |
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(i) |
such LG Affiliate agrees in writing, as set forth in Schedule
11, to be bound by the obligations of LGS and to comply with all
the terms and conditions of this Agreement LGS shall deliver to ARM
a copy of the LG Affiliate’s undertaking within thirty (30)
days of the execution of such undertaking; |
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(ii) |
any breach of the terms and conditions of this Agreement by a
LG Affiliate shall constitute a breach of this Agreement by
LGS; |
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(iii) |
any termination of this Agreement as provided by Clause 18
shall be effective in respect of all LG Affiliates; |
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(iv) |
any licence, granted in accordance with the provisions of this
Clause 2.9, shall automatically terminate upon any LG Affiliate
ceasing to be a member of the LG Group. |
| 3. |
Verification of ARM Compliant Products |
| 3.1 |
LGS shall manufacture and characterise a Test Chip for the
ARM7TDMI Core and any Modified ARM7TDMI Core. |
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(i) |
run the Vectors, in the appropriate format, on the Test Chip
and deliver to ARM, a copy of the log (“the Log
Results”) generated by running the Vectors together with five
(5) samples of the Test Chip: and |
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(ii) |
run the AVS on the Test Chip (by means of a PIV Card) and
deliver to ARM a copy of the log (“the AVS Results”)
generated by running the AVS. |
ARM may, at ARM’S
discretion, exercise the right to run the Vectors and/or AVS on the
Test Chip.
| 3.3 |
The ARM7TDMI Core shall be verified upon: |
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(i) |
ARM’S acceptance, of the Log Results either; (a)
delivered by LGS; or (b) generated by ARM. The Log Results shall be
accepted when they indicate that no errors have been detected or
where any errors detected have been jointly agreed, in good faith,
and a waiver agreed between the parties: and |
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(ii) |
ARM’s acceptance of the AVS Results either; (a) delivered
by LGS; or (b) generated by ARM. The AVS Results shall be accepted
when they indicate that no differences have been detected between
the AVS Results and the AVS reference file supplied by ARM or where
any errors detected have been jointly agreed, in good faith, and a
waiver agreed between the parties. |
ARM shall notify LGS, in
writing, within thirty (30) days of delivery by LGS of the Log
Results and Test Chip samples to ARM (the “Verification
Period”), whether the Test Chip has been verified or has
failed the verification process. In the event that the Test Chip
fails the verification process, ARM shall provide details of the
errors which cause the failure to LGS and LGS shall endeavour to
correct the errors. The parties shall repeat the above process
until either: (i) the Test Chip is verified; or (ii) LGS withdraws
the Test Chip from the verification process. In the event that ARM
fails to notify LGS of the result of the verification process
within the Verification Period, the Test Chip subject to the
verification process shall be deemed verified.
| 3.4 |
Provided that: (a) the Test Chip has been verified in
accordance with the provisions of Clause 3.2; and (b) the ARM
Compliant Product containing the ARM Core contained in such Test
Chip runs the Core Functional Test Vectors and they indicate that
no errors have been detected (or where any errors detected have
been jointly agreed, in good faith, and a waiver agreed between the
parties), LGS may distribute such ARM Compliant Product without
further verification. |
| 3.5 |
LGS shall provide to ARM. free of charge, within thirty (30)
days of verification in accordance with Clause 3.2, fifty (50)
samples of each Test Chip manufactured by LGS on each process
utilised for such manufacture, so that ARM, at its option, may test
the compatibility of each Test Chip. For the avoidance of doubt,
there shall be no restriction on ARM’s use of such samples
provided that ARM shall not reverse engineer any Test Chips
provided by LGS under this Clause 3. |
| 4.1 |
In consideration of the fee (“Models Fee”) set out
in Schedule 12 Part K, ARM hereby grants to LGS a non-transferable
(subject to Clause 20.3), non-exclusive, world-wide right and
licence under the Intellectual Property, to; |
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(i) |
reproduce and use, internally and for third party support
purposes, the Models and relevant documentation; |
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(ii) |
reproduce and distribute, and sub-license (provided that the
end user agrees to be bound by the End User Licence) the Use of the
object code of the Models (excluding the Model identified in
Schedule 3 Part A); |
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(iii) |
modify, reproduce, use and distribute, in connection with the
Models (excluding the Model identified in Schedule 3 Part A), the
documentation (including any modified documentation) relevant
thereto. |
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(iv) |
sub-license the distribution rights granted to LGS under
Clauses 4.1(ii) and (iii) to Authorised Distributors
only. |
| 4.2 |
For the avoidance of doubt, except as provided by Clause
4.1(iv), no right is granted to LGS to sub-license the right to
sell, supply or otherwise distribute the Models. |
| 5.1 |
In consideration of the Fees set out in Schedule 12 Part L. ARM
hereby grants, to LGS, a non-transferable (subject to Clause 20.3),
non-exclusive, world-wide right and licence under the Intellectual
Property, to; |
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(i) |
modify the Tools and related documentation identified in
Schedule 4 solely for the purpose of providing Hangul language
support and incorporating any LGS logo; |
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(ii) |
copy and use the Tools and related documentation identified in
Schedule 4 (and any modified versions thereof created under the
provisions of Clause 5.1(i)), internally only. |
| 5.2 |
If, within the period of two (2) years from the Effective Date
LGS exercises any of the following options; |
Option 1: payment of the fees
(“Tools Distribution Option Fee 1”) set out in Schedule
12 Part H; or
Option 2: payment of the fees
(“Tools Distribution Option Fee 2”) set out in Schedule
12 Part I; or
Option 3: payment of the fees
(“Tools Distribution Option Fee 3”) set out in Schedule
12 Part J.
The licence to the Tools
provided in Clause 5.1 shall be extended to include the following
rights:
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(i) |
copy and distribute and sub-license (provided that the end user
agrees to be bound by the End User Licence) the Use of the object
code of the Tools identified in Schedule 4 Part A and Schedule 4
Part C; |
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(ii) |
copy and distribute, and sub-license (provided that the end
user agrees to be bound by the End User Licence) the use of the
Tools identified in Schedule 4 Part B (including the Tools modified
in accordance with Clause 5.1(ii)); |
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(iii) |
modify, copy, use and distribute the Tools documentation
identified in Schedule 4 Part D (including any modified Tools
documentation); |
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(iv) |
sub-license the distribution rights granted to LGS under
Clauses 5.2 (i)-(iii) to Authorised Distributors only. |
| 5.3 |
For the avoidance of doubt, except as provided by Clause
5.2(iv), no right is granted to LGS to sub-license the right to
sell, supply or otherwise distribute the Tools. |
| 5A.1 |
In consideration of the fees paid by LGS to ARM as set out in
Schedule 12 Part C. ARM hereby grants to LGS a non-transferable
(subject to Clause 20.3), non-exclusive, world-wide licence under
the Intellectual Property to; |
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(i) |
use copy and modify the Embedded ICE, internally and for third
party support purposes; |
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(ii) |
copy and distribute and sub-license (provided that the end user
agrees to be bound by the End User Licence) the Use of the binary
code derived from the source code for the Embedded ICE (together
with any modified versions thereof created under the provisions of
Clause 5A.1(i)) of the Embedded ICE. |
| 5B. |
PID7T Configurable Device Programs Licence |
| 5B.1 |
ARM hereby grants to LGS a non-transferable (subject to Clause
20.3), non-exclusive, world-wide licence under the Intellectual
Property to; |
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(i) |
use copy and modify the PID7T Configurable Device Programs
identified in Schedule 15 Part B, internally and for third party
support purposes. |
| 6. |
Verification and Test Licence |
| 6.1 |
In consideration of the fees (“Core Fees”) paid by
LGS to ARM as set out in Schedule 12 Part A. ARM hereby grants to
LGS a non-transferable (subject to Clause 20.3), nonexclusive,
world-wide right and licence under the Intellectual Property, to
copy, modify (subject to the provisions of Clause 6.2) and use
internally only, the Test Programs and associated
documentation. |
| 6.2 |
LGS may modify the Test Programs provided that; |
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(i) |
the Test Programs exhibit the same functionality after
modification as they did prior to modification; and |
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(ii) |
LGS shall, upon request, from ARM, deliver, to ARM, the source
code for such modified Test Programs and a file of the test
patterns generated using such modified Test Programs. |
| 6.3 |
ARM hereby grants, to LGS, a non-transferable (subject to
Clause 20.3), non-exclusive, |
|