PRODUCT DESIGNS ASSIGNMENT AGREEMENT

“ Business Day ” means a day that is not a Saturday, Sunday or other day on which commercial banking institutions in the State of Delaware are authorized or required by Applicable Law to be closed.

“ Confidentiality Agreement ” means that Mutual Confidentiality Agreement by and among the Joint Venture Company, Intel and Micron dated as of the Effective Date.

“ Controller Supporting Materials ” shall have the meaning set forth in Section 3.1(b).

“ Effective Date ” shall have the meaning set forth in the preamble to this Agreement.

“ Flash Memory Integrated Circuit ” means a non-volatile memory integrated circuit that contains memory cells that are electrically programmable and electrically erasable whereby the memory cells consist of one or more transistors that have a floating gate, charge-trapping regions or any other functionally equivalent structure utilizing one or more different charge levels (including binary or multi-level cell structures) with or without any on-chip control, I/O and other support circuitry.

“ Force Majeure Event ” means the occurrence of an event or circumstance beyond the reasonable control of a Party and includes, without limitation, (a) explosions, fires, flood, earthquakes, catastrophic weather conditions, or other elements of nature or acts of God; (b) acts of war (declared or undeclared), acts of terrorism, insurrection, riots, civil disorders, rebellion or sabotage; (c) acts of federal, state, local or foreign governmental authorities or courts; (d) labor disputes, lockouts, strikes or other industrial action, whether direct or indirect and whether lawful or unlawful; (e) failures or fluctuations in electrical power or telecommunications service or equipment; and (f) delays caused by the other Party or third-party nonperformance (except for delays caused by a Party’s subcontractors or agents).

“ Governmental Entity ” means any governmental authority or entity, including any agency, board, bureau, commission, court, department, subdivision or instrumentality thereof, or any arbitrator or arbitration panel.

“ In-Process Designs ” means those Pre-existing Product Designs listed on Schedule 1 indicated as “ In-Process. ”

“ Intel ” shall have the meaning set forth in the preamble to this Agreement.

“ [***] ” means that [***].

“ IP Rights ” means copyrights, trade secrets, Mask Work Rights and registrations of any of the foregoing anywhere in the world.

“ Joint Venture Company ” means IM Flash Technologies, LLC, a Delaware limited liability company that is the subject of the Joint Venture Documents.

“ Joint Venture Documents ” means that certain Master Agreement by and between the Parties dated November 18, 2005 and each agreement referenced therein (whether directly or indirectly through reference in any of such referenced agreements).

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“ LLC Operating Agreement ” means the Limited Liability Company Operating Agreement, dated as of the Effective Date, by and between the Parties.

“ Losses ” shall mean, collectively, any and all liabilities, damages, losses, costs and expenses (including reasonable attorneys’ and consultants’ fees and expenses).

“ Mask Work Rights ” means rights under the United States Semiconductor Chip Protection Act of 1984, as amended from time to time, and under any similar counterpart laws in countries other than the United States.

“ Micron ” shall have the meaning set forth in the preamble to this Agreement.

“ Missing Materials ” shall have the meaning set forth in Section 2.4.

“ NAND Controller ” means a discrete integrated circuit device that controls the data input and output to/from the memory array of the NAND Flash Memory Die.

“ NAND Flash Memory Design ” means, with respect to a NAND Flash Memory Die, the corresponding design components, materials and information listed on Schedule 2, and all IP Rights in and to those design components, materials and information listed on Schedule 2.  Notwithstanding anything to the contrary in the foregoing, NAND Flash Memory Design shall not include any Patent Rights.

“ NAND Flash Memory Die ” means a discrete integrated circuit die, wherein such die includes at least one NAND Flash Memory Integrated Circuit and such die is designed, developed, marketed and used primarily as a non-volatile memory die.

“ NAND Flash Memory Die Package ” means a discrete integrated circuit package for a NAND Flash Memory Die, including TSOP, COB, BOC, BGA and FBGA or other type package, wherein such package contains only one or more NAND Flash Memory Die but no other die.

“ NAND Flash Memory Integrated Circuit ” means a Flash Memory Integrated Circuit wherein the memory cells included in the Flash Memory Integrated Circuit are arranged in groups of serially connected memory cells (each such group of serially connected memory cells called a “ string ”) in which the drain of each memory cell of a string (other than the first memory cell in the string) is connected in series to the source of another memory cell in such string, the gate of each memory cell in such string is directly accessible, and the drain of the uppermost bit of such string is coupled to the bitline of the memory array.

“ NAND Flash Memory Product ” means any NAND Flash Memory Wafer, NAND Flash Memory Die or NAND Flash Memory Die Package.

“ NAND Flash Memory Wafer ” means a prime wafer that has been processed to the point of containing multiple NAND Flash Memory Die and that has undergone Probe Testing, but before singulation of said die into individual semiconductor die.

“ Party ” and “ Parties ” shall have the meaning set forth in the preamble to this Agreement.

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“ Patent Rights ” means any and all issued and unexpired patents and pending patent applications in any country in the world, together with any and all divisionals, continuations, continuations-in-part, reissues, reexaminations, extensions, foreign counterparts or equivalents of any of the foregoing, wherever and whenever existing.

“ Permitted Affiliate ” means, with respect to a Party, any Affiliate of such Party except to the extent otherwise agreed by Intel and Micron in any other Joint Venture Document (such exception being applicable only while any applicable term(s) of the Joint Venture Documents remain in effect).

“ Person ” means any natural person, corporation, joint stock company, limited liability company, association, partnership, firm, joint venture, organization, individual, business, trust, estate or any other entity or organization of any kind or character from any form of association.

“ Pre-existing Product Designs ” means the NAND Flash Memory Designs, as and to the extent that each element thereof exists on the Effective Date, for each of the NAND Flash Memory Products listed on Schedule 1.

“ Probe Testing ” means testing, using a wafer test program as set forth in the applicable Specifications, of a wafer that has completed all processing steps deemed necessary to complete the creation of the desired NAND Flash Memory Integrated Circuits in the die on such wafer, the purpose of which test is to determine how many and which of the die meet the applicable criteria for such die set forth in the Specifications.

“ Publicly Available Software ” means (a) any Software that contains, or is derived in any manner (in whole or in part) from, any Software that is distributed as free Software, open source Software (e.g. Linux) or similar licensing or distribution models; and (b) any Software that requires as a condition of use, modification and/or distribution of such Software that such Software or other Software incorporated into, derived from or distributed with such Software (i) be disclosed or distributed in source code form, (ii) be licensed for the purpose of making derivative works, or (iii) be redistributable at no charge.  Publicly Available Software includes Software licensed or distributed under any of the following:  (1) GNU’s General Public License (GPL) or Lesser/Library GPL (LGPL); (2) the Artistic License (e.g., PERL); (3) the Mozilla Public License; (4) the Netscape Public License; (5) the Sun Community Source License (SCSL); (6) the Sun Industry Source License (SISL); and (7) the Apache Software license.

“ Software ” means computer program instruction code, whether in human readable source code form, machine executable binary form, firmware, scripts, interpretive text, or otherwise.  For avoidance of doubt, Software does not include databases and other information stored in electronic form, other than executable instruction codes or source code that is intended to be compiled into executable instruction codes.

“ Specifications ” means those specifications used to describe, characterize, and define the quality, functionality and/or performance of any NAND Flash Memory Die, including any interim performance requirements at Probe Testing or other testing.

“ Supporting Materials ” means, with respect to each NAND Flash Memory Design, those things set forth on Schedule 3 solely as and to the extent (a) such things exist on the

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Effective Date, (b) they are either owned by Micron or are licensed to Micron with the right to sublicense without any further payment to any Third Party, and (c) Micron is not prohibited by Applicable Law or contractual restriction from disclosing or licensing as contemplated under this Agreement.

“ Tangible Design Package ” shall have the meaning set forth in Section 2.3 below.

“ Term ” shall have the meaning set forth in Section 8.1.

“ Third Party ” means any Person other than Micron or Intel.

1.2                                  Certain Interpretive Matters .

(a)                                   Unless the context requires otherwise, (1) all references to Sections, Articles, Exhibits, Appendices or Schedules are to Sections, Articles, Exhibits, Appendices or Schedules of or to this Agreement, (2) each accounting term not otherwise defined in this Agreement has the meaning commonly applied to it in accordance with GAAP, (3) words in the singular include the plural and visa versa, (4) the term “ including ” means “ including without limitation, ” and (5) the terms “ herein, ” “ hereof, ” “ hereunder ” and words of similar import shall mean references to this Agreement as a whole and not to any individual Section or portion hereof.  All references to $ or dollar amounts will be to lawful currency of the United States of America.  All references to “ day ” or “ days ” will mean calendar days.

(b)                                  No provision of this Agreement will be interpreted in favor of, or against, any of the Parties by reason of the extent to which any such Party or its counsel participated in the drafting thereof or by reason of the extent to which any such provision is inconsistent with any prior draft of this Agreement or such provision.

ARTICLE 2

PRE-EXISTING DESIGNS

2.1                                  Assignment .  Subject to the terms and conditions of this Agreement, Micron, on behalf of itself and its Affiliates, hereby  grants, conveys and assigns (and agrees to cause its Affiliates to grant, convey and assign) to Intel, by execution of this Agreement (or, where appropriate or required, by execution of separate instruments of assignment), all right, title and interest that Micron and Affiliates of Micron have in and to the  Pre existing Product Designs and [***], to be held and enjoyed by Intel and Intel’s successors and assigns.

2.2                                  Further Assurances .  For a period of [***] from the Effective Date, Micron will, without receiving any further consideration, at the reasonable request of Intel, do (and cause Affiliates of Micron to do) all lawful and just acts that are necessary to record and perfect the transfer of ownership to Intel of any IP Rights in and to the Pre-existing Product Designs and [***], including execution and acknowledgement of (and causing its Affiliates to execute and acknowledge) assignments and other instruments in a form reasonably required by Intel for each relevant jurisdiction.  All costs and expenses associated with recording or perfecting such transfer of ownership shall be borne solely by Intel.

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2.3                                  Delivery .  Promptly following the Effective Date, except for the In-Process Designs, Micron shall deliver to Intel the tangible information and materials embodying the Pre-existing Product Designs and Supporting Materials in formats and on storage media mutually agreed to by the Parties (hereinafter, the “ Tangible Design Package ”), in accordance with the delivery protocol set forth on Schedule 6 .  Within [***] of the Effective Date, Micron shall deliver to Intel the datasheets and all errata thereto (as identified in Schedule 2 ) associated with the Pre existing Product Designs other than the In-Process Designs.

2.4                                  Missing Materials .  If within [***] of the Effective Date, Intel identifies any information, documents or any other materials that is/are missing from the Tangible Design Package (“ Missing Materials ”) subsequent to delivery of the Tangible Design Package by Micron, Intel may request Micron in writing to deliver the Missing Materials to Intel within a period of time identified by Intel, and Micron sh